Compositions including a collection layer

ABSTRACT

Systems and methods are described for compositions, apparatus and/or electronic devices. A composition, includes a composition layer defining a first surface and a second surface, the composition layer including a collection layer that is located closer to the first surface than to the second surface. An apparatus, includes a semiconductor absorber layer defining a first surface and a second surface; and an electrode layer coupled to the first surface of the semiconductor absorber layer, wherein the semiconductor absorber layer includes a collection layer that is located closer to the first surface than to the second surface. A electronic device includes a semiconductor structure for absorbing, the semiconductor structure for absorbing defining a first surface and a second surface; and an electrode structure for conducting coupled to the second surface of the semiconductor structure, where the semiconductor structure includes a collection layer that is located closer to the first surface than to the second surface.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The invention relates generally to the field of materials. Moreparticularly, the invention relates to a composition, apparatus and/orphotovoltaic device that includes a collection layer. The collectionlayer can include undesirable materials such as excess precursor(s),secondary phase precipitates, impurities, residue and/or debris and itsfunction can be to sequester these undesirable materials in a safelocation away from sensitive device locations such as semiconductorjunction regions. The invention thus relates to compositions, apparatusand/or devices that can be characterized by the presence of a collectionlayer.

[0003] 2. Discussion of the Related Art

[0004] A plethora of methods have been used for the synthesis of films(coatings) composed of materials from the CIS (copper indium selenide)material system and related alloys, but each of the previous methods hascharacteristics that limit their applicability to the economicalmanufacture of films with properties suitable for application tooptoelectronic devices, such as photovoltaic (PV) devices. PV devicesrequire an optical absorber that also provides sufficiently longminority carrier lifetimes to enable the collection of the minoritycarriers by the electrodes in the device's structure without excessiverecombination. In all semiconductor materials minority carrier lifetimesare dependent on the defect structure of those materials. The control ofdefect structure is critical to the successful manufacture of PVdevices. Similarly the defect structure of high-temperaturesuperconductors, electroluminescent phosphors, and other(opto-)electronic materials control the physical properties thatdetermine their efficacy for their respective intended uses.

[0005] Thin film optical absorbers are more economical than thick filmabsorbers or coatings because they require a smaller amount of theprecursor materials than thick films or coatings. The formation of thinfilms with desirable defect properties is predominately determined bythe method by which they are synthesized. Early efforts to fabricatethin film CIS PV devices that relied on the steady-state co-depositionof the constituent elements copper, indium, and selenide were not verysuccessful¹. The first efficient thin film CIS PV devices were achievedby a two-step process that relied on the sequential deposition of twolayers onto a substrate at high temperature, each with differentcomposition. These layers reacted and intermixed to yield a nominallyuniform composition throughout their combined thickness, and resulted infilms with desirable defect structures²⁻⁴. Variations of this methodhave been demonstrated, based on different temperatures, numbers oflayers, and compositions thereof.^(5,6). Other fundamentally differentapproaches have been described that rely on, for example: (1) heatingstacked layers of the metals (e.g., copper, indium and gallium) andselenide that have been sequentially deposited at low temperatures⁷⁻⁹,(2) thermal reaction of metallic layer precursors in hydrogenselenide^(10,11) or selenide vapor¹², (3) thermal reaction of oxideparticulate precursor mixture layers at high temperatures¹³, and (4)thermal reaction of binary (Cu,Se) and (In,Se) precursor layers^(14,15).

[0006] An economical process for the manufacture of thin films of thesesorts of non-stoichiometric multinary compounds needs to bothefficiently use raw materials and be rapid (for low cost), but must beflexible to enable control of the defect structures required for highperformance. None of the methods in the prior art provide an optimalcombination of these features. Heretofore, the requirements of efficientraw material utilization, rapid fabrication, and flexibility foroptimization of defect properties referred to above have not been fullymet. What is needed is a solution that simultaneously addresses all ofthese requirements.

SUMMARY OF THE INVENTION

[0007] There is a need for the following embodiments. Of course, theinvention is not limited to these embodiments.

[0008] According to an aspect of the invention, a method comprises:exerting a pressure between a first precursor layer that is coupled to afirst substrate and a second precursor layer that is coupled to a secondsubstrate; forming a composition layer; and moving the first substraterelative to the second substrate, wherein the composition layer remainscoupled to the second substrate. According to another aspect of theinvention, a method comprises: applying an electrostatic field across afirst precursor layer that is coupled to a first substrate and a secondprecursor layer that is coupled to a second substrate; forming acomposition layer; and moving the first substrate relative to the secondsubstrate, wherein the composition layer remains coupled to the secondsubstrate. According to another aspect of the invention, a methodcomprises: locating a template within at least one of a first precursorlayer that is coupled to a first substrate and a second precursor layerthat is coupled to a second substrate; forming a composition layer; andmoving the first substrate relative to the second substrate, wherein thecomposition layer remains coupled to the second substrate. According toanother aspect of the invention, a method comprises: providing asurfactant as an impurity within at least one of a first precursor layerthat is coupled to a first substrate and a second precursor layer thatis coupled to a second substrate; forming a composition layer; andmoving the first substrate relative to the second substrate, wherein thecomposition layer remains coupled to the second substrate. According toanother aspect of the invention, an apparatus comprises: a first holder;a second holder coupled to the first holder; a linkage coupled to thefirst holder and the second holder to move the first holder relative tothe second holder; a reusable tool coupled to the first holder, thereusable tool including a raised patterned surface; and a release layercoupled to the raised patterned surface of the reusable tool. Accordingto another aspect of the invention, a composition comprises: acomposition layer defining a first surface and a second surface, thecomposition layer including a collection layer that is located closer tothe first surface than to the second surface.

[0009] These, and other, embodiments of the invention will be betterappreciated and understood when considered in conjunction with thefollowing description and the accompanying drawings. It should beunderstood, however, that the following description, while indicatingvarious embodiments of the invention and numerous specific detailsthereof, is given by way of illustration and not of limitation. Manysubstitutions, modifications, additions and/or rearrangements may bemade within the scope of the invention without departing from the spiritthereof, and the invention includes all such substitutions,modifications, additions and/or rearrangements.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The drawings accompanying and forming part of this specificationare included to depict certain aspects of the invention. A clearerconception of the invention, and of the components and operation ofsystems implemented the invention, will become more readily apparent byreferring to the exemplary, and therefore nonlimiting, embodimentsillustrated in the drawings, wherein like reference numerals designatethe same elements. The invention may be better understood by referenceto one or more of these drawings in combination with the descriptionpresented herein. It should be noted that the features illustrated inthe drawings are not necessarily drawn to scale.

[0011] FIGS. 1A-1D illustrate schematic side views of a subgenericprocess to produce a composition layer on a substrate, representing anembodiment of the invention.

[0012] FIGS. 2A-2D illustrate schematic side views of a process toproduce a CIS absorber layer on an electrode coated substrate,representing an embodiment of the invention.

[0013] FIGS. 3A-3D illustrate schematic side views of a pressurecontainment utilizing process to produce a CIGSS layer on an electrodecoated substrate, representing an embodiment of the invention.

[0014] FIGS. 4A-4B illustrate schematic side views of an electrostaticfield utilizing process to produce a CIGSS layer on an electrode coatedsubstrate, representing an embodiment of the invention.

[0015] FIGS. 5A-5B illustrate schematic side views of a templateutilizing process to produce a CIGSS layer on an electrode coatedsubstrate, representing an embodiment of the invention.

[0016] FIGS. 6A-6B illustrate schematic side views of a surfactantutilizing process to produce a CIGSS layer on an electrode coatedsubstrate, representing an embodiment of the invention.

[0017]FIG. 7 illustrates a schematic sectional view of a PV device thatincorporates an absorber layer formed on an electrode coated substrate,representing an embodiment of the invention.

[0018]FIG. 8 illustrates a schematic elevational view of a system thatincorporates a plurality of PV devices shown in FIG. 7.

[0019] FIGS. 9A-9B illustrate top and expanded sectional views,respectively, of a release layer coated tool, representing an embodimentof the invention.

[0020]FIG. 10 illustrates a schematic view of an hexagonal array ofrelease layer coated tools, representing an embodiment of the invention.

[0021]FIG. 11 illustrates a schematic cross view of a manufacturingsystem that includes a release layer coated rotating cylindrical tool,representing an embodiment of the invention.

DESCRIPTION OF PREFERRED EMBODIMENTS

[0022] The invention and the various features and advantageous detailsthereof are explained more fully with reference to the nonlimitingembodiments that are illustrated in the accompanying drawings anddetailed in the following description. Descriptions of well knownstarting materials, processing techniques, components and equipment areomitted so as not to unnecessarily obscure the invention in detail. Itshould be understood, however, that the detailed description and thespecific examples, while indicating preferred embodiments of theinvention, are given by way of illustration only and not by way oflimitation. Various substitutions, modifications, additions and/orrearrangements within the spirit and/or scope of the underlyinginventive concept will become apparent to those skilled in the art fromthis disclosure.

[0023] Within this application several publications are referenced bysuperscript Arabic numerals. Full citations for these, and other,publications may be found at the end of the specification immediatelypreceding the claims. The disclosures of all these publications in theirentireties are hereby expressly incorporated by reference herein for thepurpose of indicating the background of the invention and illustratingthe state of the art.

[0024] The specification of this application is similar to U.S. Ser. No.09/______,______, filed Sep. 20, 2001 (attorney docket no. HELE:002US);U.S. Ser. No. 09/______,______, filed Sep. 20, 2001 (attorney docket no.HELE:003US); U.S. Ser. No. 09/______,______, filed Sep. 20, 2001(attorney docket no. HELE:004US); U.S. Ser. No. 09/______,______, filedSep. 20, 2001 (attorney docket no. HELE:005US); and U.S. Ser. No.09/______,______, filed Sep. 20, 2001 (attorney docket no. HELE:006US),the entire contents of all of which are hereby expressly incorporated byreference herein for all purposed.

[0025] The below-referenced U.S. Patents disclose embodiments that weresatisfactory for the purposes for which they are intended. The entirecontents of U.S. Pat. No. 4,392,451 to Mickelsen, et al., issued Jul.12, 1983; U.S. Pat. No. 4,523,051 to Mickelsen, et al., issued Jun. 11,1985; U.S. Pat. No. Re. 31,968 to Mickelsen, et al., reissued Aug. 13,1985; U.S. Pat. No. 5,396,839 to Tuttle, et al., issued Oct. 18, 1994;U.S. Pat. No. 5,436,204 to Albin, et al., issued Jul. 25, 1995; U.S.Pat. No. 5,441,897 to Noufi, et al., issued Aug. 15, 1995; U.S. Pat. No.5,567,469 to Wada, et al., issued Oct. 22, 1996; U.S. Pat. No. 5,578,503to Karg, et al., issued Nov. 26, 1996; and U.S. Pat. No. 5,674,555 toBirkmire, et al., issued Oct. 7, 1997 are hereby expressly incorporatedby reference herein for all purposes.

[0026] In general, the context of the invention can include thefabrication of a composition layer, coating or film that may be used ina subassembly, which may in-turn be used in a larger assembly. Thecontext of the invention can include the fabrication of a semiconductorlayer, coating or film for use in, for example, a photovoltaic deviceand/or system. The context of the invention can also include thefabrication of a superconductor layer, coating or film for use in, forexample, an electronic or electrical device and/or system.

[0027] The invention solves the problems in the prior art approachesdiscussed above by providing precursor layers on different surfaceswhich are then placed into contact with one another. The precursorlayers can then be interacted chemically and/or physically to producethe composition layer. The surfaces can be defined by one or moresubstrates and/or one or more tools. The substrate(s) and/or tool(s) caneach define one, or more than one, surface onto which the precursorsubstance is deposited. The substrate(s) and/or tool(s) can becompliant, thereby improving contact between the precursor layers,improving pressure control, structure transfer and/or surface behaviorduring interaction of the precursor layers.

[0028] Preferred embodiments of the invention deposit two differentprecursor layers onto two different substrates, or on a substrate and atool, or even on two different tools. The deposited precursor layers arethen contacted together. The contacted precursor layers can thensubsequently interact under the influence of motion, heat, pressure,electrostatic fields, (quasi)epitaxial forces, surfactants, magneticfields and/or catalysts. At least a part of one of the substrates canthen be modified. The composition layer can remain coupled to the othersubstrate. Modifying can include removing, by etching and/or mechanicalmotion. It may be desirable not to modify a portion of the firstsubstrate, for example not remove that portion so that it remains on thecomposition layer. The surfaces can then be moved relative to oneanother resulting in release of the unified layer(s) from one of theoriginal surfaces and/or adhesion of the unified layer(s) to only one ofthe original surfaces.

[0029] FIGS. 1A-1D show a sequence of process steps. In FIG. 1A, a firstsubstrate 110 is coupled to a release layer 120. The release layer 120is coupled to a first precursor layer 130. A second substrate 140 iscoupled to a second precursor layer 150. In FIG. 1B, the first precursorlayer 130 and the second precursor layer 150 have been brought intocontact so they can interact directly. The contact is preferablyintimate to establish and maintain a planar interaction front. In FIG.1C, a composition layer 160 has resulted from the interaction. In FIG.1D, the first substrate 110 and the release layer 120 have been movedaway from the composition layer 160 which remains on the secondsubstrate 140.

[0030] The invention can include the formation of a collection layer170, preferably located between the composition layer 160 and the secondsubstrate 140. The location of the collection layer 170 away from a freesurface 161 of the composition layer 160 can be an important aspect ofthe invention. The function of the collection layer 170 can be tosequester undesirable material, preferably in a safe location. Thecollection layer 170 (which can also be termed a collection zone) can bepositioned away from sensitive device locations such as semiconductorregions. The collection layer can include undesirable material such asexcess precursor(s), secondary phase precipitates, impurities, residueand/or debris. The collection layer 170 can provides a physicalsignature or fingerprint that can be detected and/or characterizedwithin assemblies (devices) that incorporate the composition layer 160.The collection layer 160 can make a determination of whether anelectronic (e.g., photovoltaic) device infringes the claimed inventionrelatively easy.

[0031] The interaction between the precursors layers can be chemical(e.g., reactants forming a product) and/or physical (e.g., two polymersintermingling to form a copolymer or two metals diffusing together toform a solid solution). The invention is more flexible than the priorart approaches described previously because it allows separateoptimization of the composition, structure, and deposition processes forthe precursor (e.g., reactant) layers apart from the optimization of thechemical and/or physical reaction used to form the composition layer(e.g., a chemical product layer in the form of a final film).

[0032] It is desirable that the compositions of the two precursor layersbe such that a difference of melting point temperature exists betweenthem so that one of them may be heated to its melting point temperaturewithout melting the other. This enables a thin-film liquid-solidreaction process, which can be controlled by the application of motion,heat, pressure, electrical bias, templates, and/or surfactants betweenthe compliant substrate and reusable tool to yield layers, coatingand/or films with the desired composition (and gradients thereof),structure and defect distributions.

[0033] These precursor structures (e.g., layers) are different fromthose previously described in the art because they are designed inpairs, one for deposition onto each of the two surfaces (e.g., toolsurface and substrate surfaces). The substrate upon which the unifiedcomposition layer is formed by the interaction of the pair of precursorscan remain as part of an assembly containing the composition layer.

[0034] The other substrate can be a reusable tool composed of, forexample, silicon. The working surface of the reusable tool can be coatedwith a release layer composed of, for example, calcium fluoride,strontium fluoride and/or their alloy (Ca,Sr)F₂. Such a reusable toolcan be used to apply pressure, as a counter-electrode for electricalbiasing, and/or as a crystallographic template to control the structureof the precursor structure grown thereupon, can be recharged withsubsequent precursor structures, optionally on a continuous basis.

[0035] The invention can include the fabrication of the precursorlayer(s) on the substrate(s). For instance, the precursor layers can befabricated by sputtering followed by plasma discharge, particledeposition, physical vapor deposition and/or chemical vapor deposition.In a preferred embodiment, one or both of the precursor layers can befabricated by sputtering of an elemental metal (e.g., copper) followedby plasma discharge of another element (e.g., elemental selenide vapor).

[0036] The invention can include subsequent processing of thecomposition layer. For instance, the composition layer can bepost-process heated in an atmosphere (e.g., air or oxygen) to tailor thedefect structure and/or improve performance. This post-processingheating in an atmosphere can be termed annealing.

[0037] The invention can include devices that incorporate the resultingcomposition layer(s) (e.g., PV devices that contained the compositionlayer as an absorber layer(s)). Further, the invention can also includesystems that include such devices. The invention can include equipmentfor forming the composition layer(s).

[0038] The following example uses the copper-indium-selenide (CIS)material system and material systems formed by the addition of gallium(CIGS), sulfur (CISS), or aluminum (ACIS), and/or combinations thereof(e.g., CIGSS, ACIGSS, etc.). The use of these material systems is merelyexemplary of the methods described herein and is not intended to suggestthat the invention is limited to these material systems. The generalproperties of these materials that render the invention applicable willbe described in enabling detail.

[0039] FIGS. 2A-2D depict a process sequence used to make a CIS materiallayer. In FIG. 2A, a reusable tool 210 is coupled to a calcium fluoriderelease layer 220. The calcium fluoride release layer 220 is coupled toan indium selenide precursor layer 230. A compliant substrate 240 iscoupled to a molybdenum electrode 245. The molybdenum electrode 245 iscoupled to a copper selenide precursor layer 250. In FIG. 2B, the indiumselenide precursor layer 230 and the copper selenide precursor layer 250have been brought into intimate contact. In FIG. 2C, a chemical reactionproduct layer 260 (CIS) has resulted from the interaction. In FIG. 2D,the reusable tool 210 and the calcium fluoride release layer 220 havebeen moved away from the chemical reaction product layer 260 whichremains on the compliant substrate 240.

[0040] In this example, CIS films are formed by the deposition of binarycopper monoselenide onto a molybdenum-coated substrate and indiumsesquiselenide onto a calcium fluoride-coated silicon substrate. Sincethe substrates are separate, the deposition of these precursor layerscan be done at different temperatures. When these composites are broughttogether under mechanical pressure and rapidly heated to an appropriatetemperature of above approximately 520° C. but below approximately 635°C., only the copper monoselenide layer will melt.

[0041] Sufficient mechanical pressure can substantially prevent the lossof selenide vapor from the reaction zone, thereby achieving highlyefficient incorporation of selenide into the composition layer (in thisexample, a chemical product layer). In this example, the pressure shouldbe from approximately 0.01 atm to approximately 10.0 atm, preferablyfrom approximately 0.2 atm to approximately 1.0 atm if sulphur ifsubstantially not present. Other examples that do not use copperselenide may not need as much pressure.

[0042] In this example, the adhesion of the resulting CIS film to themolybdenum will be substantially stronger than its adhesion to thecalcium fluoride release layer and the resulting CIS film will onlyadhere to the molybdenum-coated substrate, permitting reuse of thecalcium fluoride-coated silicon substrate as a reusable tool. In thisexample, the final thickness of the CIS film can be from approximately0.5 microns to approximately 3.5 microns, preferably from approximately1.0 microns to approximately 3.0 microns.

[0043] The invention can include the use of an electrostatic fieldapplied across the first precursor layer and the second precursor layer.

[0044] The application of a voltage between the molybdenum film (orunderlying substrate carrier) and the silicon wafer (which bears thecalcium fluoride coating), with the electrostatic potential of thesilicon wafer higher than that of the molybdenum film, will tend toretard the transport of positive copper ions into and through both theindium sesquiselenide layer and the resulting adjacent indium-rich CISlayer that is formed during the reaction. The calcium fluoride releasecoating is an insulator, thereby preventing current flow between theprecursor layers and establishing the electrostatic field.

[0045] This will assist in maintaining a planar reaction front. Thiswill also assist in minimizing composition fluctuations by providing anegative feedback mechanism to inhibit the formation of dendriticstructures during the reaction. The electric field applied can be fromapproximately 0.03 volts/micron to approximately 3.5 volts/micron,preferably from approximately 0.3 volts/micron to approximately 1.0volts/micron. It can be appreciated that the electric field can generatea significant force between the first precursor and the secondprecursor, thereby adding to pressure that is otherwise exertedmechanically. Further, the overall pressure can be controlled (e.g.,modulated) without mechanical manipulation by changing the appliedelectric field.

[0046] The electrical bias during the synthesis process can be appliedin a large number of ways and the optimal technique will depend on thedetails of the materials used for the various parts. If the releaselayer is an electrically insulating material and the reusable toolconductive, the bias is preferably applied between the electrode layerand the tool. The closer that the biased surfaces are brought togetherthe higher the electric field strength across the precursor layersduring the synthesis process for any given potential difference betweenthose electrodes. In any case it is desirable that there is at least onenon-conducting layer separating the biased electrodes so that electricalcurrent does not flow between them when their precursor layers arebrought into contact with one another.

[0047] The use of an electrical bias between the upper and lowersubstrates during heating and precursor interaction can have a number ofbeneficial effects. First, a static potential difference will alwayscreate an attractive force between the precursors that will serve toinsure their intimate contact during heating. A static potentialdifference can be used to control the pressure in the reaction zoneitself, an elementary consequence of electrostatic field theory.

[0048] The tendency of the electric field to planarize the reactionfront between the binary precursors used in the preferred embodiment forCIS synthesis is a more subtle consequence of the fact that theirreaction product, CIS, is substantially less electrically conductivethan either of the precursors themselves. As a consequence, anyperturbation that creates curvature at the interface between arelatively conductive binary precursor and CIS locally increases theelectric field intensity. If the direction of that field inhibitsdiffusion of the ionic reactants, the reaction front will be slowed inproportion to the local curvature. This self-moderation effect (negativefeedback) tends to planarize the reaction front, and its relevance tothe synthesis of a composition layer by this method is contingent onlyon (1) the composition (e.g., product) being substantially lessconductive than the precursors (e.g., reactants), and (2) the existenceof at least one ionic specie that must transport out of a precursorlayer, in this example to react and lead to formation of the productmaterial. Note that in the context of condensed state material physicsthe phrase ionic specie, as used herein, is defined as an entity whichfeels a force in the presence of an electric field. Of course, thepolarity of the electrostatic field can be reversed. As an initialconfiguration parameter, during the interaction and/or modulated duringthe interaction.

[0049] There can be explosive kinetics involved. The electrostatic fieldcan be used to control the reaction trajectory. It may be desirable toreverse the field in different parts of the process. It is possible touse the reverse bias to slow down the diffusion of copper. It is alsopossible to reverse an initial electrostatic field over part of thereaction cycle, to force copper out at a faster rate, thereby changingthe kinetics by changing the relative attachment rate to the crystalgraphic front, of copper and selenide. This can be termed forward bias.The invention can include incorporating selenide into the lattice fromthe melt. But the selenide does not have a crystallographic guidingforce or a chemical guiding force to attach to that surface, unless oneis also transporting copper into it. If the selenide is allowed toattach faster than the copper, a phase transition would then occur thatcould cause solidification within that liquid layer. Faster selenideattachment involves a shift over to the side of the binary phase diagramwhere the dominant stable specie is di-copper selenide, Cu2Se. Incontrast, with slower selenide attachment the dominant stable specie iscloser to CuSe. By reverse biasing, the diffusion of copper into theindium-selenide layer can be inhibited. A build up of copper in thatlayer occurs faster than rolling up the selenide. It is undesirable tomove toward the Cu2Se side of the phase diagram and precipitate solidCu2Se crystals. The field can be used to control the relative transportrate. In this example, the interaction is a transport-related reaction.The desired crystalline properties are propagated up toward the toollayer by, among other things, solid state diffusion of copper. The solidstate transports but it is not necessarily diffusive transporting.Diffusive transport is governed by the diffusion equation so that italways end up with a straight line profile for composition. However,non-diffusive transport is possible. An example is convection.Convection is characterized by a first order differential equationrather than a second. With a field-assisted transport, an intermediatecase is acquired, which depends on the field strength. That intermediatecase, depending on the direction of the field, can either inhibit thecopper transport or, accelerate it. The injection of copper into thatsurface will lead to a restructuring process. Therefore, a higher coppercontent at the front can be desirable. I the front copper content ishigh enough, it will have already caused a transformation from hexagonalto FCC stacking. That is the desirable crystallographic front to whichthe copper transporting through the indium selenide should attach. Analternating field as well as a static field, or combinations thereof maybe used to create the electric bias. By modulating a reversal of thefield, the reaction trajectory can be controlled, optionally in a timedomain manner.

[0050] The invention can include the use of a structure transfer layeror substance. These structure transfer layer(s) and/or substance(s) canbe termed a template. The template can be used to transfer themorphology of one layer to another. The template can be used to transfermeta-symmetry from one layer to another. The template can be used toepitaxially transfer a lattice structure from one layer to another.

[0051] As an example of a template layer, the invention can includeputting a relatively group 1 rich template film (e.g., copper indiumselenide) on the release layer. The upper end of such a relatively group1 rich layer can be approximately 25% group 1 by mole. The additionalcopper or other group 1 element tends to attach or incorporate morecopper during the precursor interaction. The crystallographic structureof a pure indium selenide film varies with the ratio of indium toselenide in the film. But it is always irrespective of that ratiocharacterized by a hexagonal stacking of the selenide sub-lattices. Apotential problem is that the composition layer desired in the end mayhave a different stacking structure. Aluminum and copper can be alloyedcan be alloyed on the Group 1 sublattice sites in this structure.Gallium and germanium can be alloyed among the Group 3 lattice sites.Sulfur and selenide can be alloyed on the Group 6 sites. Theprototypical compound for these examples is copper indium diselenide.And all of these compounds, if they have sufficient copper, will becharacterized by face centered cubic stacking of the selenide sublatticerather than hexagonal. The idea of alloying Group 1 elements into thefront surface (between the release layer and the precursor bulk) is tocreate a part of that layer which will be transferred that is alreadycharacterized by the desired FCC structure for the group 6 sublattice,which is the one that sulfur and selenide lie on. If one creates a veryhighly ordered layer, even though that layer may be very thin, it willact as a template for the regrowth and the restructuring of theunderlying precursor layer onto the template (from the hexagonalstacking into the FCC stacking).

[0052] A very highly ordered region at that top surface is desirablesince that top surface becomes the junction. A structure like this maybe used to implement bandgap-composition engineering, that iscontrolling the forbidden gap in the graded-composition layers. Thus, itcan be desirable to put in elements that substantially do notredistribute during the reaction process. An example of a relativelystatic group 1 element is aluminum. Aluminum is far less mobile thancopper. By adding aluminum to the surface region in contact with thereusable tool, it will stay there, and it will have the effect ofincreasing the width of the band gap in that region, which can be usedto tailor the electronic properties of the junction region itself.Further, it can be desirable to add sulfur to this region to tailor theproperties of the junction.

[0053] By controlling the ratio of the different elements, the positionof the electrochemical potential can be controlled. The electrochemicalpotential at absolute zero is equivalent to and referred to byphysicists in general as the Fermi level.

[0054] By constraining the surface of the group 1 rich layer against therelease layer of the reusable tool, it can take on the surfacemorphology of the tool, which can be used to create a very smoothjunction, which is desirable from an electronic point of view becausethe voltage of the device is proportional to the logarithm of the ratioof the light-generated current to the recombination current. Therecombination current at the junction is directly proportional to thejunction's surface area. It is, therefore, desirable to minimize theactual contact area to allow the voltage to go up. To keep the actualcontact area minimized you should keep the junction interface flat.

[0055] The invention can include the use of a process facilitator suchas a surfactant. The surfactant can be an alkali (e.g., sodium). Thesurfactant can be incorporated into one or both precursors as animpurity. The maximum local content of surfactant should not exceed thethreshold for precipitation of secondary phases (e.g., approximately0.5% by weight of sodium in the case of CIS and related materials). Thesurfactant lowers surface tension. The surfactant can improve diffusionrates, improve the crystallographic structure, defect properties and/orplanarity.

[0056] The sodium may prevent the formation of local defects which canlead to an undesirable crystallographic structure. The sodium tends toaggregate at the interface of the high copper region and the high indiumregion. It can be desirable to alloy the sodium during the deposition ofthe indium selenide layer to have a substantial sodium content near therelease layer. If a high copper layer is located between the releaselayer and an adjoining sodium impurity containing sublayer of the indiumselenide, the sodium impurity containing sublayer will ride on theinterface between the high indium and the high copper, and retard theincorporation of copper except at that interface. This can involveforming a junction crystallographic region first, and then incorporatingsodium behind that region. Aluminum can be included in the regionadjoining the release layer. The aluminum will be less mobile than thecopper. Sulfur can also be included in the region adjoining the releaselayer. Sulfur improves the defect properties at the junction. Whensodium is incorporated at concentration low enough to preventprecipitation of sodium selenides, it will ride on that interface andcollect there. The copper being transported through will not crystallizeout; the copper will not initiate precipitation of another nucleus,until the copper hits that interface where the copper is already high,and it will displace the sodium, floating the sodium towards the meltsurface. Thus, the invention can include a release layer, then analuminum-copper-indium-gallium sulfo-solenide layer and then a sodiumcontaining layer, followed by the bulk of the first precursor layer.

[0057] The sodium should be introduced as an impurity rather than aseparate layer. The sodium should be delivered to one or both of theprecursor layers in a dilute form during the growth of the precursorlayer(s). The reason the sodium can move (can ride on the interface) maybe that the sodium has lower solubility in the ternary compound (e.g.,CIGS, which is an alloy of two ternary compounds) than in the binarycompound. If the sodium is too concentrated, undesirable a secondaryphase may precipitate. The surfactant may work better if it is not thatconcentrated.

[0058] The invention can include incorporating the sodium as an impuritythroughout all of the first precursor layer and/or all of the secondprecursor layer. This can be desirable since some of the sodium may beleft behind in the crystallizing material layer as the primarysurfactant containing layer advances (floats) away from the releaselayer. Doping the sodium as an impurity throughout the first precursorlayer and/or the second precursor layer can be used to replace thatsodium which may be left behind. However, if the doping concentration ofthe sodium throughout the first precursor layer and/or the secondprecursor layer is too high, the advancing primary surfactant containinglayer may become too rich in sodium. If the sodium impurityconcentration layer becomes too high, undesirable secondary sodiumcontaining phases may precipitate within the crystallizing compositionlayer. Further, the concentration of the sodium impurity within theprimary sodium containing layer can change as a function of the floatvelocity. A high float velocity will tend to compress the primary sodiumcontaining layer. Again, if the sodium concentration is too high,undesirable secondary sodium containing phases may precipitate.Therefore, it may be desirable to control the float velocity to preventexcessive sodium build-up or, alternatively, increase the sodiumconcentration if it is too low.

[0059] All of the techniques described in the preceding example of apreferred embodiment of an approach for CIS synthesis do not need to beused together in order to provide a superior alternative to existingapproaches. For example, the precursors described above could both bedeposited onto the molybdenum surface and the calcium fluoride-coatedsilicon substrate coated with a very thin film of CIS, CIGS, CIGSS, orACIGSS before the assembly is brought together under pressure. In eithercase, the use of calcium fluoride as an interlayer between theprecursors and the silicon serves the multiple functions of a releaselayer, a diffusion barrier to the thin film's elemental components, adielectric barrier preventing electrical current flow from the siliconsurface through the film during synthesis if a voltage bias is used, anda crystallographic template for the epitaxial growth of the film.

[0060] It should also be noted that the relative position of theprecursor layers described in the foregoing example is not essential.The copper selenium containing precursor layer could be initiallydeposited on the release layer coated tool. The indium seleniumcontaining precursor layer could be initially deposited on theelectrocoated substrate. The auxiliary layers (the group 1 rich layerand the surfactant containing layer) might then also need to berepositioned.

[0061] The use of just temperature and mechanical pressure to controlthe reaction trajectory of the film formation process would still besuperior to processes using only a single substrate because theinvention can prevent the loss of selenide during the reaction. Selenidevapor is not efficiently incorporated into films grown by conventionalco-deposition methods, leading to additional equipment and raw materialscost to avoid its deficiency in the product when such approaches areused, since inadequate selenide incorporation is known to yield CIS withpoor electronic properties for PV device applications. This avoidance ofthe need for additional equipment and/or raw materials can be a verysignificant advantage of the invention.

[0062] Another example of a partial implementation of the precedingexample of a preferred CIS embodiment would be to use that same methodbut without the pressure exerted by the precursors. The temperature, theelectrostatic field, the template(s), the surfactants, the magneticfield and/or catalyst(s) would still be sufficient to drive theinteraction between the precursors, albeit with the possible loss ofvapor from the precursors and/or material layer, depending on thecomposition of these layers.

[0063] Another example of a partial implementation of the precedingexample of a preferred CIS embodiment would be to use that same methodbut without an electrical bias between the substrate and the tool. Thepressure exerted between the precursors, the templates, thesurfactant(s), the magnetic field and/or catalyst(s) would still besufficient to drive the interaction between the precursors.

[0064] Another example of a partial implementation of the precedingexample of a preferred CIS embodiment would be to omit the template. Thepressure exerted between the precursors, the electrostatic field, thesurfactant(s), the magnetic field and/or catalyst(s) would still besufficient to drive the interaction between the precursors. Many of thebenefits described here will still accrue in the situation where noappropriate epitaxial dielectric is available. For example, anon-epitaxial dielectric layer of alumina oxide would still act as aneffective atomic diffusion and current barrier, but without the benefitsof transferring a desirable crystallographic orientation and grainstructure from the tool into the growing film.

[0065] Another example of a partial implementation of the precedingexample of a preferred CIS embodiment would be to omit the processfacilitator (e.g., surfactant). The pressure exerted between theprecursors, the electrostatic field, the templates, the magnetic fieldand/or catalyst(s) would still be sufficient to drive the interactionbetween the precursors.

[0066] FIGS. 3A-3D shows an example of the synthesis of CIGSS absorberfilms for PV device applications. In FIG. 3A, a reusable tool 310 iscoupled to a (Ca,Sr)F₂ release layer 320. The (Ca,Sr)F₂ release layer320 is coupled to an (In,Ga)_(y)(S,Se)_(1−y) precursor layer 330. Acompliant glass substrate 340 is coupled to a titanium/molybdenumelectrode 345. The electrode 345 is coupled to a copper selenideprecursor layer 350. In FIG. 3B, the (In,Ga)_(y)(S,Se)_(1−y) precursorlayer 330 and the copper selenide precursor layer 350 have been broughtinto intimate contact. In FIG. 3C, a chemical reaction product layer 360(CIGSS) has resulted from the interaction. In FIG. 3D, the reusable tool310 and the (Ca,Sr)F₂ release layer 320 have been moved away from thechemical reaction product layer 360 which remains on the compliant glasssubstrate 340.

[0067] If the reusable tools surface is made of silicon and the releaselayer of calcium fluoride, strontium fluoride, or alloys thereof (i.e.,(Ca,Sr)F₂), then the appropriate choice of alloy composition can providea surface for the deposition of an indium-gallium sulfo-selenideprecursor with virtually the same crystallographic symmetry at theirinterfaces and lattice constants throughout those layers, facilitatingthe epitaxial growth of a highly crystalline (In,Ga)_(y)(S,Se)_(1−y)composition layer when the precursor layers are brought into contact.Thus, the superior crystallinity of the solid phase precursor layer(pre-reaction product) resulting from the use of a crystallographicallycoherent tool and release layer will be retained during the formationreaction with the liquid phase precursor layer, leading to superiorcrystallinity in the resulting solid CIGSS absorber film, which is thereaction product.

[0068] The precursor layers shown in FIGS. 3A-3D are examples ofprecursor structures, and may contain other chemical elements (e.g., forthe synthesis of compounds other than CIGSS as in this example). Inaddition to those primary compositional elements required to form thereaction product, impurities that act as surfactants in any particularmaterial system can also be incorporated. For example in the case ofCIGSS synthesis, it is preferable that at least one of these precursorlayers contains an alkali impurity such as sodium to facilitate the.formation and stability of smooth, planar compositional interfacesduring the reaction between the fluid and solid phases created bymelting of one of the precursor layers after they are brought intocontact with one another. Since the function of surfactants occurs atthe interface between the precursors and sublayers of differentcompositions, within those layers, the surfactant(s) may be initiallydistributed within one or both of the precursors predominately at theirrespective free surfaces. Alternatively, the surfactant(s) may beinitially distributed between the release layer and its coupledprecursor layer, especially if a group I rich template layer is locatedbetween the surfactant and the release layer. One consequence of thismethod of introducing a surfactant is that it will not be distributedpredominately at the free surface of the final reaction product film, incontrast to all other reported methods. This can be an importantadvantage of the invention since sodium may be particularly undesirablenear, or in, the junction region.

[0069] Each of the reactant precursor layers shown in FIGS. 3A-3D mayitself be graded in composition or comprised of sublayers with differentcomposition. In particular, the relative amounts of indium, gallium,sulfur, and selenide may vary throughout the thickness of the(In,Ga)_(y)(S,Se)_(1−y) precursor layer but should be substantiallyuniform at any given depth within the layer at distinct points acrossthe layer. Such gradients may be modified by the product reactionprocess but should still result in a final product film with uniformaverage composition across the film, albeit possibly retaining vestigesof the initial depth-dependent composition gradient.

[0070] FIGS. 4A-4B show an example of applying an electrostatic fieldacross the two precursors. Referring to the upper subassembly of FIG.4A, a reusable tool 410 is coated with a release layer 420. The releaselayer 420 should have a high dielectric constant and a high breakdownvoltage. A (In,Ga)_(y)(S,Se)_(1−y) precursor layer 430 is coupled to therelease layer 420. Referring to the lower subassembly of FIG. 4A, acompliant substrate 440 is coated with an electrode layer 445. A group 3containing adhesion layer 447 is coupled to the electrode layer 445. ACu_(x)Se_(1−x) precursor layer 450 is coupled to the group 3 containingadhesion layer 447. The group 3 containing adhesion layer 447 canfacilitate the wetting of the melted precursor. The group 3 containingadhesion layer 447 should stick to the electrode. The group 3 containingadhesion layer 447 should not melt, while the precursor layer 450 may.The parentheticals in FIG. 4A represent the voltage applied across theprecursor layers during the interaction of the precursor layers. Eachparenthetical includes a first value and a second value separated by acomma. The first value represents the electrostatic field configurationused to slow down the diffusion of copper. The second value representthe electrostatic field configuration used to speed up the diffusion ofcopper. In FIG. 4B, a CIGSS absorber layer 460 is shown coupled to aresidual group 3 containing adhesion layer 465. There are noparentheticals in FIG. 4B, since the interaction is complete noelectrostatic field is being applied. Needless to say, it can beadvantageous to switch off the electrostatic field before attempting tomove the reusable tool 410 relative to the compliant substrate 440.

[0071] Referring now to FIGS. 5A-5B, a template can be located withinthe subassembly composed by the reusable tool and the(In,Ga)_(y)(S,Se)_(1−y) layer. This can be implemented by adding some ofthe copper required to achieve the desired overall composition into thepredominately (In,Ga)_(y)(S,Se)_(1−y) layer or a sublayer thereof Forexample, a sublayer with an overall atomic ratio of copper to indiumplus gallium of about one-fifth (0.2≈[Cu]/([In}+[Ga])) to one-half maybe added at the precursor's interface with the release layer, at thatprecursor's free surface, or throughout its entire thickness.

[0072] FIGS. 5A-5B show an example of locating multiple templates nextto the precursors. Referring to the upper subassembly of FIG. 5A, areusable tool 510 is coated with a release layer 520. As discussedabove, when the release layer has a composition defining a crystallinestructure that matches the crystalline structure of the desired finalfilm (e.g., in the case of a CIGSS absorber layer (Ca,Sr)F₂), therelease layer can function as a template. In addition to the templatecapability of the release layer, this example features a(Al,Cu)(In,Ga)(S,Se) template layer 525 coupled to the release layer520. A (In,Ga)_(y)(S,Se)_(1−y) precursor layer 530 is coupled to the(Al,Cu)(In,Ga)(S,Se) template layer 525. Referring to the lowersubassembly of FIG. 5A, a compliant substrate 540 is coated with atitanium adhesion layer 542. An electrode layer 545 is coupled to thetitanium adhesion layer 542. A (Al,Cu)(In,Ga)(S,Se) template layer 547is coupled to the electrode layer 545. A Cu_(x)Se_(1−x) precursor layer550 is coupled to the (Al,Cu)(In,Ga)(S,Se) template layer 547. In FIG.5B, a CIGSS absorber layer 560 is shown sandwiched between a firstresidual template layer 570 and a second residual template layer 580.The first residual template layer 570 corresponds to the(Al,Cu)(In,Ga)(S,Se) template layer 525. Similarly, the second residualtemplate layer 580 corresponds to the (Al,Cu)(In,Ga)(S,Se) templatelayer 547. The titanium adhesion layer 542 can remain largelyundisturbed between the electrode layer and the compliant substrate.

[0073] FIGS. 6A-6B show an example of locating multiple surfactantcontaining layers within and/or next to the precursors. Referring to theupper subassembly of FIG. 6A, a reusable tool 610 is coated with arelease layer 620. An aluminum copper saturated layer 625 is coupled tothe release layer 620. A sodium containing layer 627 is coupled to thealuminum copper saturated layer 625. A (In,Ga)y(S,Se)1−y precursor layer630 is coupled to the sodium containing layer 627. In addition to thesurfactant capability of the sodium containing layer 627, a sodiumcontaining layer 633 is coupled to the (In,Ga)y(S,Se)1−y precursor layer630. While this example shows both of the sodium containing layers 627and 633, the invention does not require both, or even one, of theselayers. Referring to the lower subassembly of FIG. 6A, a compliantsubstrate 640 is coated with an electrode layer 645. A CuxSe1−xprecursor layer 650 is coupled to the electrode layer 645. In additionto the surfactant capability of the sodium containing layer 627, and thesodium containing layer 633, another sodium containing layer 655(CuySe1−Y:Na) is coupled to the CuxSe1_x precursor layer 650. While thisexample shows three sodium containing layers 627, 633 and 655, theinvention does not require all three, or two, or even one, of theselayers. Of the three depicted sodium containing layers, the sodiumcontaining layers 627 is preferred since it may more predictably andcontrollably float down as diffused copper accumulates. The accumulationof diffused copper above the sodium containing layer 627 is discussed inmore detail above. In FIG. 6B, a CIGSS absorber layer 660 is shownsandwiched between a residual aluminum copper saturated layer 675 and acollection layer 685. The residual aluminum copper saturated layer 675corresponds to the aluminum copper saturated layer 625. The collectionlayer 685 is a zone for the collection of whatever is not incorporatedin the absorber layer 660. The collection layer 685 provides processtolerance. The region of the absorber layer 660 near the electrode layer645 is an acceptable zone for the precipitation of secondary phases thatcontain excess reactants. By precipitating these secondary phases, theycan be irreversibly bound in a tolerable location. The collection layercan be termed a gettering layer. The collection layer 685 can beutilized with other precursor-material layer systems, not justabsorbers. If not in a kinetically limited regime, at the growthinterface there is an energetic barrier to further incorporation of thatexcess. The excess presence in the collection zone 685 can includesecondary copper containing phases (e.g., Cu₂Se precipitates) and/orsecondary sodium containing phases (e.g., NaInSe₂ precipitates). Thecollection layer 685 can include residue from the sodium containinglayer 625. The collection layer 685 can also include residue from thesodium containing layers 633 and 655 if copper from the Cu_(x)Se_(1−x)precursor layer 650 does not overtake the sodium from the sodiumcontaining layers 633 and 655 before the sodium from these layers reachthe aluminum copper saturated layer 625. The collection layer 685 canalso include other undesirable phases and debris.

[0074] The substrate preferably presents at least one compliant surface.The compliant substrate may be formed for example of a polymericmaterial such as polyimide, a relatively soft metal foil, or an alkaliglass with a glass transition temperature near the desired processingtemperature. In the latter case, the mechanical compliance that providesfor intimate contact between the thin (e.g., less than or equal toapproximately 10 microns) precursor layers results from softening of theglass near its glass transition temperature. The compliant substrateneed not be uniform in composition, and may itself be comprised both ofa nominally uniform, relatively rigid bulk with a thin compliant layerat or near its interface with the electrode layer. A non-homogenouscomposite substrate can be structured where the melting point is lowernear the interface with the precursor. Such a layered structure can becreated by chemical etching techniques that leave a porous surfacestructure or by the deposition of an interfacial layer of anothermaterial. The interfacial layer of another material can include meltingpoint lowering substances such as sodium and/or potassium. Theinterfacial layer of another material can include a colloidal dispersionof silica sodium glass particles deposited by dipping or sprayingmethods. Other alkalis may be used provided that they have a lower glasstransition (i.e., softening) temperature. The higher sodium or potassiumcontaining silicates melt at a lower melting point than the lower sodiumor potassium containing glasses. By coating a rigid substrate, anintimate contact between the two precursor layers can be facilitated.Without a compliant coating to facilitate intimate contact waves,ripples, ridges and other kinds of surface features may prevent the twoprecursor layers from coming into intimate contact with one another. Ofcourse, the substrate does not have to be compliant.

[0075] The metal electrode preferably includes molybdenum metal, but maybe a multilayered structure including other metallic layers such astitanium. In this case, the titanium can be either sandwiched betweenmolybdenum layers as etch-stop layers or located at the back interfacewith the compliant substrate in order to promote adhesion of theremainder of the electrode with the compliant substrate.

[0076] The invention can include an optional adhesion layer between thecopper selenide and the electrode. The adhesion layer between the copperselenide and the electrode can include a Group 3 element, (e.g.,gallium) or a group 3 containing compound (e.g., indium tellurium). Whenthe copper selenide melts into the form of liquid, it may be desirableto have a wetting layer there, and one of the best ways to create such awetting layer is to add a Group 3 element to actually form CIS at thatback interface. As long as the dominant re-growth process occurs fromthe other interface, opposite the molten layer, the re-growth processmay transfer the crystal graphic structure from that other interfaceinto the bulk. This depends on the relative growth rate in the twodirections. The relative growth rate can be modulated by the electricfields.

[0077] The invention can include the use of barrier layers. As notedabove, the release layer can simultaneously function as a barrier layer.It may be desirable to create an epitaxial silicide barrier layerbetween the silicon and the release layer, to prevent copper fromgetting into the silicon. A copper diffusion barrier useful inconjunction with the invention includes tungsten silicide. In order toget to the underlying silicon, copper needs to transport through therelease layer. Therefore, one logical place to locate such a barrierneed to be at the interface between the silicon and the release layer.It might be useful to have another optional barrier layer near theelectrode. The invention can include a barrier layer between theelectrode and its adherent precursor structure, for example the copperselenide. Indium or gallium can be added into the copper selenide layerto create an interfacial layer of CIS or CIGS which would not be of highcrystallographic quality, but which would adhere very strongly both tothe copper selenide and the electrode. The barrier layer at thatinterface between the copper selenide and the electrode would help toprevent diffusion of sodium from a glass substrate into the reactantlayer. However, one of the advantages of the invention is that thealkali atoms in the compliant layer may not have time to transportthrough the glass matrix into the electrode layer. The invention canalso include an optional sodium barrier layer between the compliantsubstrate and the electrode. With a polyimide surface it might benecessary to use titanium as a barrier and/or adhesion layer. Titaniumis an effective adhesion layer in layered systems.

[0078] While not being limited to any particular performance indicatoror diagnostic identifier, preferred embodiments of the invention can beidentified one at a time by testing for the presence of uniformcomposition at a given depth in the composition layer. The test for thepresence of uniform composition at a given depth in the compositionlayer can be carried out without undue experimentation by the use of asimple and conventional dynamic SIMS (secondary ion mass spectroscopy)experiment. Among the other ways in which to seek embodiments having theattribute of uniform composition at a given depth in the compositionlayer guidance toward the next preferred embodiment can be based on thepresence of uniform performance (e.g., electrical, photovoltaic,chemical, etc.).

Devices that Incorporate the Material Layers

[0079] Referring to FIG. 7, the invention can include devices thatincorporate the material layer(s). FIG. 7 depicts a photovoltaic devicethat is useful as a solar cell for electric power generation. A glasssubstrate 710 is coupled to an electrode 720. The electrode 720 iscoupled to an absorber layer 730. Examples of absorber layers arediscussed above in detail and include CIS, CIGS, CISS, ACIS, ACIGSS andGIGSS.

[0080] A buffer layer 740 is coupled to the absorber layer 730. Thebuffer layer 740 is sometimes inaccurately referred to as a passivatinglayer. A good buffer layer usable with the invention can include cadmiumsulfide, for example cadmium sulfide zinc oxide. Other substantiallynon-conducting buffer layers include indium oxides, indium selenides,cadmium sulfide, zinc selenide, and zinc oxide and alloys thereof.

[0081] A window layer 750 is coupled to the buffer layer 740. Thetransparent conducting window layer 750 provides lateral conductivity.Needless to say, the window is transparent in order to get light to theabsorber. And it has to be laterally conductive in order to get theelectrons out and over to an external circuit via a grid line ifpresent, or a bus bar. The window functions as a front electrode. Theinvention can use zinc oxide which is optically transparent as thewindow. Alternatively, the invention can include using a conductive zincoxide for the window and a relatively non-conductive zinc oxide. In thiscase, the non-conductive zinc oxide becomes part of the buffer layer. Ifthe window layer that provides the lateral conductivity includes zincoxide, it can be achieved with an electrical donor impurity, examples ofwhich are indium, gallium, aluminum or phosphorous.

[0082] An optional trace grid 760 is coupled to the window layer 750. Ifa grid is used, it can be a metallic bi-layer of nickel, in contact withthe zinc oxide and then aluminum on top of the nickel. It is undesirableto put aluminum directly on zinc oxide since it will chemically reactand form aluminum oxide which is insulating, The device includes anoptional encapsulating package 770 that can be made of a polymer (e.g.,poly vinyl acetate block copolymer). The device can be coupled to a busbar (not shown).

[0083] An antireflection layer is not necessary with these materials.The buffer layer acts as an anti-reflection coating. The stack ofmaterials described has a graded index of refraction. The refractiveindex drops from window to electrode. The refractive index of zinc oxidewindow is lower than the index of the buffer which is lower than that ofthe absorber. In this way, the structure builds in an anti-reflectioncharacteristic. A problem with anti-reflection coatings is, that the inthese particular type of devices, the enhancement in performance isusually not worth the extra cost.

Systems that Incorporate the Devices

[0084] Referring to FIG. 8, the invention can include systems thatincorporate devices that include the material layer(s). FIG. 8 depicts amobile electric power generating system. An array of solar cells 810 iscoupled to a tracking subsystem 820. The array of solar cells 810 can berotated and tilted by the tracking subsystem 820 and is shown in anorthogonal position for visual clarity. The tracking subsystem 820 caninclude electronics that include semiconductor components which includethe material layer(s) described in detail above. The tracking subsystem820 is coupled to a vehicle 830. The vehicle 830 can include an electricpower storage subsystem such as a battery bank, a capacitor bank and/oran inductor bank that can include superconducting magnetic componentswhich include the material layer(s) described in detail above.

Equipment for Manufacturing the Material Layers

[0085] Two different generic manufacturing approaches described, ofwhich each can implement the techniques of the invention. The firstapproach is designed to sequentially process substrates with a discretetool and can therefore be termed a “batch” process. The second approachcan be termed a “continuous” process uses a continuous processing tooland either a continuous series of discrete substrates or a continuouslyfed flexible sheet substrate.

[0086] An example of a tool that can be used for discrete substrateprocessing is shown in FIGS. 9A-9B. FIGS. 9A-9B depict cross-sectional(FIG. 9B) and plane-view (FIG. 9A) schematic drawings of an exemplarydiscrete processing tool 910. A release layer 920 is coupled to the tool910. In this example, a round silicon wafer is used as a reusable tool.This reusable tool has been patterned in cross-sectional relief toprovide a raised hexagonal surface. In this example, the release layer920 includes calcium fluoride. The raised surface of the layer 920defines the area of contact of the tool, and its release layer, and itsprecursor coating (first precursor), with the substrate, and itsprecursor coating (second precursor). The tool's precursor-coating willbe brought into contact with the substrate's precursor coating andtransferred during the process of formation. The use of a hexagonalpattern is only one example. Better performance for PV applications canbe achieved by using geometrical patterns which can be tiled by multipleapplications of the tool(s) to cover substantially all of thesubstrate's surface (e.g., triangles, parallelagrams, etc.).

[0087] After the release layer 920 of the tool 910 has been coated withits appropriate precursor layer it is placed in contact with thesubstrate that has been coated with the other reactant precursor. If thetool has been already been preheated to the desired reactiontemperature, pressure should be applied immediately. It may bepreferable to preheat the tool and substrate to an initially lowertemperature so that they may be brought into contact first and thenrapidly heated while their contact pressure is increased. The pressurecan be increased by increasing a mechanically applied force and/or byincreasing an applied electrostatic field. The pressure can be similarlydecreased.

[0088] One of the potential problems with using calcium fluoride as arelease layer is that the material is mechanically soft. It may bedesirable to, after transferring the product layer off of the releaselayer surface, recycle the release layer coated tool to a substantiallyhigher temperature in order to get the release layer to smooth out,thereby improving the surface of the release layer for subsequentre-deposition of a fresh precursor layer. If the tool lifetime becomesproblematic using a relatively soft material like calcium fluoride, itmight be preferable to use an extremely hard material, for example,diamond.

[0089] Irrespective of whether the specific material combination ofsilicon as the reusable tool material and calcium fluoride, strontiumfluoride and/or (Ca,Sr)F₂ as the release layer is used, it is desirablethat the materials used for these components be capable of sustainingthe high processing temperatures of at least approximately 500° C.,preferably at least approximately 600° C., without excessive degradationof their mechanical, crystallographic, and electrical properties.

[0090] One of the advantages of the invention is that most of the heatrequired to form a high-quality final layer can be provided by heat flowthrough the tool and release layer rather than by heating the compliantsubstrate. This permits the use of materials for the substrate thatwould not be stable if heated to such high temperatures for extendedperiods of time (e.g., plastics such as polyimide). Thus, the totalthermal budget for the process can be reduced by either very rapidheating (e.g., greater than or equal to approximately 50° C./second) ofthe tool after it is brought into contact with the substrate, or by verybrief contact (e.g., less than or equal to approximately 2 seconds,preferably less than or equal to approximately 0.5 seconds) between thepreheated tool and substrate (i.e., long enough for the material layercomposition formation to be substantially complete).

[0091] Rapid heating may be achieved by numerous methods including butnot limited to the following approaches. Rapid heating may be achievedby applying an electrical bias to the silicon wafer while simultaneouslypassing a current pulse through the wafer laterally to rapidly heat it(this approach may require a holder for the tool designed to make atleast two electrical contacts on opposite edges of the wafer). Rapidheating may be achieved by bringing an electrically biased, heatedpiston into contact with the back side of the tool. Rapid heating may beachieved by heating the rear surface of the wafer radiatively to thereaction temperature while separately biasing the wafer via anelectrical contact to the wafer. Of course, these rapid heating methodscan be combined.

[0092] Referring to FIG. 10, an apparatus for implementing this processneed not necessarily handle each tool as a separate entity. Tools may,for example, be placed together into an array on a larger platen, whichis then treated as a meta-tool in the same manner as described above.For this variation of the apparatus design it may be preferable to shapea plurality of individual tools as hexagon shaped wafers, rather thanproviding a hexagonal relief on a round silicon wafer, to define thecontact area between the meta-tool and substrate. Multiplestep-and-repeat transfer steps might be required to create aclose-packed tiled array of reactant product film areas over a largesubstrate, particularly if the ganged-wafer tool is itself not aclose-packed tiled array.

[0093]FIG. 10 depicts a tool-mounting platen 1010 used to gang togetherindividual hexagonal wafers 1020 (and half-wafers 1030). The platen 1010can provide parallel electrical contacts to these wafers forsimultaneous processing. The tool shown in FIG. 10 would enablesimultaneous formation of a material layer (e.g., chemical product film)over substantially a substrate's entire surface, even if the substratewere large. Substrates larger than the depicted meta-tool could also beaccommodated with a step and repeat approach. The individual wafers neednot necessarily be hexagonal, but could also be, for example, triangularor rectangular. The tool wafers need not necessarily be composed of asingle crystal, but could instead be multicrystalline.

[0094] The invention can include continuous substrate processingapparatus. An alternative to the use of multiple individual wafers in aplanar array is shown in FIG. 11. FIG. 11 depicts a schematic drawing ofan exemplary continuous processing apparatus to implement the reactivesynthesis and simultaneous transfer method of multinary compoundformation.

[0095] A continuous substrate 1110 (web) passes under a rotatingcylindrical tool 1120. A radiant heater 1130 is located within the tool1120. The tool 1120 and the radiant heater 1130 are located within ahousing 1140. A series of deposition sources 1150 for the precursor thatis carried by the tool is also located within the housing 1140. Upstreamfrom the tool 1120 is a series of deposition sources 1160 for theprecursor that is carried by the substrate 1110. The sources 1160 arelocated within a housing 1170. The tangental approach of the cylindricaltool 1120 may cause the pressure exerted on the precursors to ramp-upand then ramp-down. This can be a significant advantage in transportreactions.

[0096]FIG. 11 shows a cylindrical tool geometry. For CIS synthesis thistype of tool could be made of either a single continuous silicon tube¹⁶or multiple rectangular silicon slabs mounted onto a supporting tube,with each rectangular slab then ground to create a cylindrical surfacewhen the slabs abut one another. This type of tool is most useful forprocessing either a continuously fed flexible sheet or a continuousseries of discrete substrates.

[0097] In the case of the silicon tool and calcium fluoride releaselayer structure, an alloy can be used to bond semicylindrical or arcuatetools to a metal drum. This would permit piece-wise replacement of thesilicon tools, rather than having to replace all the tools on the wholedrum which might be required if the drum is made of solid silicon. Thereare good mechanical reasons to use a bonding alloy as well, such asthermal expansion considerations. Further, it may be more cost-effectiveto make the drum out of strips of silicon rather than a whole cylinderof silicon.

[0098] It is desirable that the release layer stay on the tool when thecomposition layer is transferred off the release layer. As noted above,the invention can include an optional adhesion layer between the tooland the release layer. The release layer can be part of the tool andpreferably remains part of the tool after separation. Whether such anoptional adhesion layer is needed depends on the material used for therelease layer and for the body of the tool. If the body of the tool, forexample is silicon, and the release layer, for example is calciumfluoride, there may be no need to introduce an adhesion layer in betweenthe two. The adhesion between those surfaces is by an epitaxialtransition that creates a chemical bond between the calcium fluoride andthe silicon, which sticks very well. However, other materialcombinations might benefit from such an optional adhesion layer.

[0099] The particular manufacturing process used for implementing theinvention should be inexpensive and reproducible. Conveniently, thepressurization aspect of the invention can be carried out by using anyforce application method. It is preferred that the process becontrollable over a wide range of pressures, most preferably within ashort time domain. For the manufacturing operation, it is an advantageto employ a direct mechanical technique.

[0100] However, the particular manufacturing process used for applyingpressurization is not essential to the invention as long as it providesthe described functionality. Normally those who make or use theinvention will select the manufacturing process based upon tooling andenergy requirements, the expected application requirements of the finalproduct, and the demands of the overall manufacturing process.

[0101] The particular apparatus used for the pressure applying apparatusshould be strong, serviceable and retoolable. Conveniently, the pressureapplying apparatus of the invention can be made of any heat resistantmaterial. It is preferred that the material be tough, corrosionresistant and amenable to cleaning.

[0102] However, the particular apparatus selected for applying pressureto the substrate(s) and/or tool(s) is not essential to the invention, aslong as it provides the described function. Normally, those who make oruse the invention will select the best commercially available materialbased upon the economics of cost and availability, the expectedapplication requirements of the final product, and the demands of theoverall manufacturing process.

[0103] The disclosed embodiments show platens or a roller and conveyoras the structure for performing the function of applying pressure, butthe structure for applying pressure can be any other structure capableof performing the function of applying pressure, including, by way ofexample a hydraulic system, an expanding gas or even an isostaticworking fluid.

[0104] The electrostatic field aspect of the invention can be carriedout by using any voltage application technique. It is preferred that thevoltage application technique be controllable over a wide range ofvoltages, most preferably within a short time domain. However, theparticular technique used to apply the voltage is not essential to theinvention as long as it generates the described electrostatic field. Theapparatus used to apply the voltage can be made of any electricallyconductive material. It is preferred that the electrically conductivematerial be heat resistant, corrosion resistant and amenable tocleaning. However, the particular apparatus used to apply the voltage isnot essential to the invention as long as it is capable of generatingthe required field.

[0105] The particular deposition process used for providing thetemplates should be inexpensive and reproducible. It is preferred thatthe process for applying the template be sputtering followed by plasmadischarge, particle deposition, physical vapor deposition and/orchemical vapor deposition. However, the particular process used todeposit the templates is not essential to the invention so long as itprovides a template possessing the described functionalities.

[0106] The particular process used to provide the surfactant as animpurity should also be inexpensive and reproducible. It is preferredthat the surfactant impurity be provided by sputtering followed byplasma discharge, particle deposition, physical vapor deposition and/orchemical vapor deposition. However, the particular process used forproviding the surfactant is not essential to the invention as long as itprovides a surfactant containing layer having the describedfunctionalities.

[0107] The invention can also utilize data processing methods thattransform signals from the precursor and/or product layers to controlprocess variables. For example, the invention can be combined withinstrumentation to obtain state variable information to actuateinterconnected discrete hardware elements. For instance, the inventioncan include the use of pressure, voltage, current and/or temperaturesensors to control pressure exerting and/or heating equipment. Thus, thepressure exerted and/or the heat applied can be varied (e.g., in timedomain) as a function of a state variable. Similarly, vacuum and/orcooling equipment may be provided and controlled.

[0108] The term layer, as used herein, is generically defined to includefilms, coatings and thicker structures. The term coating, as usedherein, is subgenerically defined to include thin films, thick films andthicker structures. The term composition, as used herein, is genericallydefined to include inorganic and organic substances such as, but notlimited to, chemical reaction products and/or physical reactionproducts. The term selenide, as used herein is defined as a materialthat includes the element selenium and does not include enough oxygen toprecipitate a separate selenate base; oxygen may be present in selenide.The term tool, as used herein, is defined as a substrate intended forre-use or multiple use. The terms a or an, as used herein, are definedas one or more than one. The term another, as used herein, is defined asat least a second or more. The term plurality, as used herein, isdefined as two or more than two. The terms including and/or having, asused herein, are defined as comprising (i.e., open language). The termcoupled, as used herein, is defined as connected, although notnecessarily directly, and not necessarily mechanically. The termapproximately, as used herein, is defined as at least close to a givenvalue (e.g., preferably within 10% of, more preferably within 1% of, andmost preferably within 0.1% of). The term substantially, as used herein,is defined as at least approaching a given state (erg., preferablywithin 10% of, more preferably within 1% of, and most preferably within0.1% of). The term deploying, as used herein, is defined as designing,building, shipping, installing and/or operating. The term means, as usedherein, is defined as hardware, firmware and/or software for achieving aresult. The term program or phrase computer program, as used herein, isdefined as a sequence of instructions designed for execution on acomputer system. A program, or computer program, may include asubroutine, a function, a procedure, an object method, an objectimplementation, an executable application, an applet, a servlet, asource code, an object code, a shared library/dynamic load libraryand/or other sequence of instructions designed for execution on acomputer system.

Practical Applications of the Invention

[0109] A practical application of the invention that has value withinthe technological arts is the manufacture of photovoltaic devices suchas absorber films or electroluminescent phosphors. Further, theinvention is useful in conjunction with the fabrication ofsemiconductors (such as are used for the purpose of transistors), or inconjunction with the fabrication of superconductors (such as are usedfor the purpose magnets or detectors), or the like. There are virtuallyinnumerable uses for the invention, all of which need not be detailedhere.

Advantages of the Invention

[0110] Coating or film synthesis representing an embodiment of theinvention, can be cost effective and advantageous for at least thefollowing reasons. The invention improves the control of defectproperties. The invention improves quality and reduces costs compared toprevious approaches.

[0111] All the disclosed embodiments of the invention disclosed hereincan be made and used without undue experimentation in light of thedisclosure. The invention is not limited by theoretical statementsrecited herein. Although the best mode of carrying out the inventioncontemplated by the inventor is disclosed, practice of the invention isnot limited thereto. Accordingly, it will be appreciated by thoseskilled in the art that the invention may be practiced otherwise than asspecifically described herein.

[0112] The individual components need not be formed in the disclosedshapes, or combined in the disclosed configurations, but could beprovided in virtually any shapes, and/or combined in virtually anyconfiguration. Further, the individual components need not be fabricatedfrom the disclosed materials, but could be fabricated from virtually anysuitable materials. Further, homologous replacements may be substitutedfor the substances described herein. Further, variation may be made inthe steps or in the sequence of steps composing methods describedherein.

[0113] Further, although the compositional layer described herein can bea separate module, it will be manifest that the compositional layer maybe integrated into the device and/or system with which it is associated(e.g., a photovoltaic devices including the compositional layer as anabsorber between an electrode and a buffer layer). Furthermore, all thedisclosed elements and features of each disclosed embodiment can becombined with, or substituted for, the disclosed elements and featuresof every other disclosed embodiment except where such elements orfeatures are mutually exclusive.

[0114] It will be manifest that various substitutions, modifications,additions and/or rearrangements of the features of the invention may bemade without deviating from the spirit and/or scope of the underlyinginventive concept. It is deemed that the spirit and/or scope of theunderlying inventive concept as defined by the appended claims and theirequivalents cover all such substitutions, modifications, additionsand/or rearrangements.

[0115] The appended claims are not to be interpreted as includingmeans-plus-function limitations, unless such a limitation is explicitlyrecited in a given claim using the phrase(s) “means for” and/or “stepfor.” Subgeneric embodiments of the invention are delineated by theappended independent claims and their equivalents. Specific embodimentsof the invention are differentiated by the appended dependent claims andtheir equivalents.

REFERENCES

[0116] 1. L. L. Kazmerski, F. R. White, and G. K. Morgan, Appl. Phys.Lett. 29, 268 (1976).

[0117] 2. R. A. Mickelsen, U.S. Pat. No. 4,392,451 (1983).

[0118] 3. R. A. Mickelsen and W. S. Chen, U.S. Pat. No. Re31,968 (1985).

[0119] 4. R. A. Mickelsen, U.S. Pat. No. 4,523,051 (1985).

[0120] 5. H. W. Schock, Appl. Surf. Sci. 92, 606 (1995).

[0121] 6. M. A. Contreras, B. Egaas, K. Ramanathan, J. Hiltner, A.Swartzlander, F. Hasoon, and R. Noufi, Progr. PV 7, 311 (1999).

[0122] 7. R. R. Arya, T. C. Lommasson, S. Wiedeman, L. Russell, S.Skibo, and J. Fogleboch, in The Conference Record of the 23rd IEEEPhotovoltaic Specialists Conference (Institute of Electrical andElectronic Engineers, Louisville, Ky., 1993), 516.

[0123] 8. G. E. Hassan, M. R. I. Ramadan, H. El-Labani, M. H. Badawi, S.Aboul-Enein, M. J. Carter, and R. Hill, Semicond. Sci. Technol. 9, 1255(1994).

[0124] 9. V. Probst, F. Karg, J. Rimmasch, W. Riedl, W. Stetter, H.Harms, and Eibl, in Materials Research Society Symposium Proceedings426, San Francisco, Calif., 1996 (Materials Research Society), p. 165.

[0125] 10. V. Kapur, B. Basol, and E. S. Tseng, Solar Cells 21, 65(1987).

[0126] 11. B. M. Basol and V. K. Kapur, in The Conference Record of the22nd IEEE Photovoltaic Specialists Conference (Institute of Electricaland Electronic Engineers, Las Vegas, Nev., 1991), 893.

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[0128] 13. C. Eberspacher, K. Pauls, and J. Serra, in Conference Recordof the 28th IEEE Photovoltaic Specialists Conference (Institute ofElectrical and Electronic Engineers, Anchorage, 2000), 517.

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What is claimed is:
 1. A composition, comprising: a composition layerdefining a first surface and a second surface, the composition layerincluding a collection layer that is located closer to the first surfacethan to the second surface.
 2. The composition of claim 1, wherein thecollection layer is located adjacent the first surface.
 3. Thecomposition of claim 1, wherein the collection layer includes a sodiumimpurity containing layer
 4. The composition of claim 3, wherein thesodium impurity containing layer includes sodium containingprecipitates.
 5. The composition of claim 4, wherein the sodiumcontaining precipitates include NaInSe₂.
 6. The composition of claim 1,wherein the collection layer includes a copper impurity containinglayer.
 7. The composition of claim 6, wherein the copper impuritycontaining layer includes copper containing precipitates.
 8. Thecomposition of claim 7, wherein the copper containing precipitatesinclude Cu₂Se.
 9. The composition of claim 1, wherein the compositionlayer includes a semiconductor layer.
 10. The composition of claim 9,wherein the semiconductor layer includes copper, indium and selenium.11. The composition of claim 10, wherein the semiconductor layerincludes aluminum, gallium and sulphur.
 12. The composition of claim 1,further comprising an electrode layer coupled to the first surface ofthe composition layer.
 13. The composition of claim 12, wherein theelectrode layer includes at least one metal selected from the groupconsisting of Mo and Ti.
 14. The composition of claim 1, furthercomprising a group 3 rich adhesion layer located between the compositionlayer and the electrode layer.
 15. The composition of claim 12, furthercomprising a substrate coupled to the electrode layer.
 16. Thecomposition of claim 15, further comprising a diffusion barrier layerlocated between the composition layer and the substrate.
 17. Thecomposition of claim 1, wherein the composition layer includes aresidual template.
 18. The composition of claim 17, wherein the residualtemplate is located closer to the second surface than to the firstsurface
 19. The composition of claim 1, further comprising a bufferlayer coupled to the second surface of the composition layer.
 20. Thecomposition of claim 19, further comprising a window layer coupled tothe buffer layer.
 21. A photovoltaic device comprising the compositionof claim
 1. 22. An electrical power generation system comprising thephotovoltaic device of claim
 21. 23. An electronic device comprising thecomposition of claim
 1. 24. A photodiode comprising the composition ofclaim
 1. 25. An apparatus, comprising a semiconductor absorber layerdefining a first surface and a second surface; and an electrode layercoupled to the first surface of the semiconductor absorber layer,wherein the semiconductor absorber layer includes a collection layerthat is located closer to the first surface than to the second surface.26. The apparatus of claim 1, wherein the collection layer is locatedadjacent the first surface.
 27. The apparatus of claim 25, wherein thecollection layer includes a sodium impurity containing layer
 28. Theapparatus of claim 27, wherein the sodium impurity containing layerincludes sodium containing precipitates.
 29. The apparatus of claim 28,wherein the sodium containing precipitates include NaInSe₂.
 30. Theapparatus of claim 25, wherein the collection layer includes a copperimpurity containing layer.
 31. The apparatus of claim 30, wherein thecopper impurity containing layer includes copper containingprecipitates.
 32. The apparatus of claim 31, wherein the coppercontaining precipitates include Cu₂Se.
 33. The apparatus of claim 25,wherein the semiconductor absorber layer includes copper, indium andselenium.
 34. The apparatus of claim 33, wherein the semiconductor layerincludes aluminum, gallium and sulphur.
 35. The apparatus of claim 25,wherein the electrode layer includes at least one metal selected fromthe group consisting of Mo and Ti.
 36. The apparatus of claim 25,further comprising a substrate coupled to the electrode layer.
 37. Theapparatus of claim 25, wherein the semiconductor absorber layer includesa residual template.
 38. The apparatus of claim 37, wherein the residualtemplate is located closer to the second surface than to the firstsurface
 39. The apparatus of claim 25, further comprising a group 3 richadhesion layer located between the semiconductor absorber layer and theelectrode layer.
 40. The apparatus of claim 25, further comprising asubstrate coupled to the electrode layer and a diffusion barrier layerlocated between the semiconductor absorber layer and the substrate. 41.The apparatus of claim 25, further comprising a buffer layer coupled tothe second surface of the semiconductor absorber layer.
 42. Theapparatus of claim 41, further comprising a window layer coupled to thebuffer layer.
 43. A photovoltaic device comprising the apparatus ofclaim
 25. 44. An electrical power generation system comprising thephotovoltaic device of claim
 43. 45. An electronic device comprising theapparatus of claim
 25. 46. A photodiode comprising the apparatus ofclaim
 25. 47. A electronic device, comprising: a semiconductor means forabsorbing, the semiconductor means for absorbing defining a firstsurface and a second surface; and an electrode means for conductingcoupled to the second surface of the semiconductor means, wherein thesemiconductor means includes a collection layer that is located closerto the first surface than to the second surface.
 48. The electronicdevice of claim 47, wherein the collection layer is located adjacent thefirst surface.
 49. The electronic device of claim 47, wherein thecollection layer includes a sodium impurity containing layer
 50. Theelectronic device of claim 49, wherein the sodium impurity containinglayer includes sodium containing precipitates.
 51. The electronic deviceof claim 50, wherein the sodium containing precipitates include NaInSe₂.52. The electronic device of claim 47, wherein the collection layerincludes a copper impurity containing layer.
 53. The electronic deviceof claim 52, wherein the copper impurity containing layer includescopper containing precipitates.
 54. The electronic device of claim 53,wherein the copper containing precipitates include Cu₂Se.
 55. Theelectronic device of claim 47, wherein the semiconductor means includescopper, indium and selenium.
 56. The electronic device of claim 55,wherein the semiconductor means includes aluminum, gallium and sulphur.57. The electronic device of claim 47, wherein the electrode meansincludes at least one metal selected from the group consisting of Mo andTi.
 58. The electronic device of claim 47, further comprising a meansfor providing a substrate coupled to the electrode means.
 59. Theelectronic device of claim 58, further comprising a barrier means forinhibiting diffusion located between the semiconductor means and themeans for providing a substrate.
 60. The electronic device of claim 47,wherein the semiconductor means for absorbing includes a residualtemplate.
 61. The electronic device of claim 60, wherein the residualtemplate is located closer to the second surface than to the firstsurface
 62. The electronic device of claim 47, further comprising agroup 3 rich means for adhering located between the semiconductor meansand the electrode means.
 63. The electronic device of claim 47, furthercomprising a means for defining a semiconductor junction coupled to thecomposition layer.
 64. The electronic device of claim 63, furthercomprising an optically transmitting means for providing lateralconductivity coupled to the means for defining a semiconductor junction.65. A photovoltaic device comprising the electronic device of claim
 4766. An electrical power generation system comprising the photovoltaicdevice of claim
 65. 67. A photodiode comprising the electronic device ofclaim 47.